Arunn's Notebook


Arunn Narasimhan

Microlithography or photolithography is extensively used in the semiconductor manufacturing as an etching technology. It is essential to the manufacturing of patterns in metals, insulators, and semiconductor devices including diodes, transistors, and Integrated Circuits.

The technique transfers the pattern of integrated circuitry from a photo-mask (a quartz plate containing the master copy of microscopic integrated circuitry) to a thin wafer (disc) made of silicon or other semiconductor material with which chips are made. A similar process is extensively used in the fabrication of MEMS devices, for example sensors, actuators and biomedical devices.

Below is a picture of a silicon wafer of 300 mm diameter on which the pattern of a chip with the integrated circuitry is etched.


Microlithography involves the deposition, baking and exposure of a photoresist for building a pattern, and a developing process for washing away the unexposed photoresist (for positive-imaging resists). A flowchart of the sequential photolithography process steps followed almost unaltered in the microlithography industry for the past two decades is given in Table 1.


Two complementary types of equipment are typically used in this industry. One is the stepper or scanner, which performs the exposure of the photoresist in, say, ultraviolet light in step 4 of Table I. The other is the lithography track/cluster, which performs all other relevant tasks in Table I. Photolithography using Deep Ultra Violet (DUV) rays is the present-day standard scanner imaging technique of the present semiconductor manufacturing industry. One main reason is the successful development of Chemically Amplified (CA) photosensitive resists (see reference 3 for the history).

The sequence of steps involved in the manufacture of a computer chip is shown in the picture below.


The accuracy of circuit patterns generated by the photolithography process is usually assessed using a representative critical dimension (CD) in terms of the smallest line-width of the patterned feature. Fundamental to the successful manufacturing of microstructures using a particular combination of photolithography parameters (resist type, radiation wavelength, scanner and lithography track process variables etc.) is the dimensional tolerance of the resulting feature, which is based on the CD measurements and or estimates.For instance, in a microchip integrated circuit with dimensions around 240 nm the acceptable tolerance error is about 24 nm. One-half of the tolerance error is estimated to be caused by the photolithography scanners (optical process) and the other half is by the various manufacturing steps done in the microlithography cluster. Use of DUV resists would further require the process variations during the manufacturing steps of the microlithography cluster to be extremely critical as they contribute to the significant spatial variations (CD) in the final features.

Specific to the microlithography cluster, the bake-chill stations (where the wafer is heated and cooled, see Table 1 and picture 2) perform a number of critical processes in the manufacturing steps of microlithography, thus contributing to the overall CD performance of the finished feature.

In the DUV irradiated, positive-tone CA photoresist lithography process, as shown in Table 1, initially, the bake-chill stations are used in a soft-bake process, to remove the solvent from the photo-resist coated wafer to thicken the resist and relieve residual stresses before exposure. Then the film of polymeric resist is exposed to patterned UV radiation, creating an image of the acid pattern (integrated circuitry) in the film. A subsequent heating step denoted as post exposure bake process in Table 1, alters the solubility of the acidic pattern in the irradiated portions of the film. This allows the desired single layer three-dimensional relief pattern to be retained on the photoresist film, upon further washing with a developer solution in the develop process in Table 1. At the conclusion of the developing process, the hard bake is performed to improve etch resistance and minimize out-gassing.

It has been observed over the past two decades [as one can learn from reference 4] that the uniformity of temperature of the photoresist during these various bake processes plays a key role in determining the uniformity of resist thickness or critical feature dimensions for subsequent unit processes such as etching, ion-implantation or deposition.

More on the Bake process and the associated inverse heat transfer problem in a separate note.


  • A great page on lithography by Chris Mack
  • A. Narasimhan, (2005), “Thermal Analysis of a Silicon Wafer Processing Combination Bake-Chill Station used in Microlithography,” Materials and Manufacturing Processes, 20, 1-14.
  • S. J. Holmes, P. H. Mitchell, and M. C. Hakey, “Manufacturing with DUV lithography,” IBM J. Res. & Dev. 41, (1997). Link to the IBM journal Issue dedicated to Optical Lithography
  • H. Ito, “Chemical Amplification Resists: History and Development within IBM,” IBM J. Res. & Dev. 44, 119-130, (2000).
  • L. F. Thompson, C. G. Willson, and M. J. Bowden, Introduction to Microlithography, 2nd edition, American Chemical Society Prof. Ref. Book, Washington, DC, 1994.
  • Wikipedia page on photolithography
© Arunn Narasimhan | Original version written ~ Feb, 2008 | Last revision on Apr 01, 2012